Interrupts & Interrupt Handling
Imagine if your computer had to constantly check if any device needed attention - that would waste a lot of CPU time! Interrupts solve this by allowing devices to signal the CPU when they need service.
What is an Interrupt?
An interrupt is a signal that causes the CPU to temporarily stop its current execution and handle a specific event. It's like your phone ringing while you're working - you pause, answer the call, then resume your work.
Interrupt Processing Flow
+---------------------------------------------+
| |
| CPU executing current instruction |
| | |
| v |
| +-------------+ |
| | Interrupt |<--- Interrupt Signal |
| | Detected | from device |
| +------+------+ |
| | |
| v |
| +-------------+ |
| | Save Current| |
| | State | |
| | (PC, Flags) | |
| +------+------+ |
| | |
| v |
| +-------------+ |
| | Jump to | |
| | Interrupt | |
| | Handler | |
| +------+------+ |
| | |
| v |
| +-------------+ |
| | Handle | |
| | Interrupt | |
| | (ISR) | |
| +------+------+ |
| | |
| v |
| +-------------+ |
| | Restore | |
| | State | |
| +------+------+ |
| | |
| v |
| Resume original instruction |
+---------------------------------------------+
Types of Interrupts
- Hardware Interrupts: External events (I/O completion, timer, keyboard press)
- Software Interrupts: Programmed by instructions (system calls, exceptions)
- Exceptions: Error conditions (divide by zero, page fault, invalid opcode)
Interrupt Handling Process
- Interrupt Request: Device sends interrupt signal
- Acknowledgment: CPU acknowledges and saves current state
- Vector Table: CPU uses interrupt number to find handler address
- Interrupt Service Routine (ISR): Special code handles the interrupt
- Return: CPU restores state and resumes interrupted work
Nested Interrupts
Modern systems support nested interrupts - a higher-priority interrupt can interrupt a lower-priority interrupt handler. This requires careful management of the interrupt stack.
Nested Interrupt Example
+---------------------------------------------+
| Time | Event |
|--------|-----------------------------------|
| T1 | CPU executing program A |
| T2 | Interrupt 1 arrives |
| T3 | Start handling Interrupt 1 |
| T4 | Interrupt 2 (higher priority) |
| | arrives - preempts Interrupt 1 |
| T5 | Handle Interrupt 2 |
| T6 | Finish Interrupt 2 |
| T7 | Resume Interrupt 1 |
| T8 | Finish Interrupt 1 |
| T9 | Resume program A |
+---------------------------------------------+